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Systems Architecture Numbers
A systems architecture extension to Peter Norvig's "Latency Numbers" (http://norvig.com/21-days.html#answers).
TODO: With some scripts to export to other formats like Mnemosyne and Anki.
CPU/Data-transfer (Norvig)
| Description |
Value |
Unit |
| Execute typical instruction |
1 |
nanosecond |
| Fetch from L1 cache |
0.5 |
nanosecond |
| Branch misprediction |
5 |
nanosecond |
| Fetch from L2 cache |
7 |
nanosecond |
| Mutex lock/unlock |
25 |
nanosecond |
| Fetch from main memeory |
100 |
nanosecond |
| Send 2 KB over 1 Gbps network |
20,000 |
nanosecond |
| Read 1 MB sequentially from memory |
250,000 |
nanosecond |
| Disk seek |
8,000,000 |
nanosecond |
| Read 1 MB sequentially from disk |
20,000,000 |
nanosecond |
| Send packet round-trip US-EU |
150,000,000 |
nanosecond |
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Eric Ihli
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